1. Field of the Invention
The present invention relates to a semiconductor device and a method for producing the same. More particularly, it relates to an interconnection structure in a semiconductor device, such as an integrated circuit (IC) device or a large-scale integration (LSI) device.
2. Description of the Prior Art
In order to make a semiconductor device (an IC or LSI device) denser, active elements (e.g., transistors) and passive elements (e.g., resistors and condensers) in the semiconductor device are made smaller, and the conductor pattern for electrically interconnecting the elements is made finer. The conductor pattern comprises conductor lines (i.e., wirings) formed on an insulating layer of, e.g, phosphosilicates glass (PSG) or silicon dioxide (SiO.sub.2) and making contact through small apertures (i.e., contact holes) in the insulating layer with the underlying device portion (e.g., a portion of the semiconductor substrate) or with an underlying conductor line.
In a case where a conductive layer (e.g., an aluminum layer) is formed by a vacuum evaporation method and is photoengraved to form a conductor pattern, i.e. a desired pattern of conductor lines, cracks form in the conductor line at the contact hole edge, and, as a result, breakage or disconnection of the conductor line can occur or the resistance value of the conductor line can increase.
In order to form a conductor line without the above-mentioned disadvantage, it is attempted to round a relatively sharp edge of the contact hole by heating the insulating layer, comprising, e.g., PSG, to its softening point. In the case, however, this heat treatment causes impurities doped in the diffused region of the semiconductor substrate to diffuse, and, thereby, the diffused region expands undesirably. It is also attempted to deposit conductive material (i.e., a contact electrode) in the contact hole only and then form the conductor line on the contact electrode and the insulating layer. In the latter attempt, as illustrated in FIG. 1, an insulating layer 1 (e.g., PSG) formed on a semiconductor substrate 2 (e.g., a silicon wafer) is selectively etched by a conventional photoetching method using a photoresist layer 3 to form a contact hole 4. As illustrated in FIG. 2, a conductive material (e.g., aluminum) is deposited on the photoresist layer 3 and the exposed surface of the substrate 2 by a vacuum evaporation method to form a contact electrode 5a and a conductive layer 5b. Then, as illustrated in FIG. 3, a photoresist layer 3 and a conductive layer 5b are simultaneously removed with a suitable solvent. This removal process is referred to as the lift off process. A wedge-shaped gap 6 (FIG. 3) is formed between the contact electode 5a and the side of insulating layer 1. As illustrated in FIG. 4, when a conductive material (e.g., aluminum) is deposited on insulating layer 1 and on contact electrode 5a by a vapor evaporation method to form a conductor layer 7, cracks 8 form in the conductor layer 7 depending on the circumstances. Accordingly, the conductor layer 7, having cracks, is patterned by a photoetching method to form a conductor line 7 having a defect, such as a break or a thin portion. In this case, the possibility of the occurrence of breaks is not as great as in the case where a conductor line is formed without using a contact electrode.